| 摘要 |
PROBLEM TO BE SOLVED: To provide a method for designing clock wiring in accordance with a power potential distribution and a reference potential distribution in an integrated circuit. SOLUTION: This integrated circuit design method comprises: an arithmetic step for calculating the power potential distribution and the reference potential distribution in the integrated circuit; and a designing step for designing clock wiring in the integrated circuit based on the power potential distribution and the reference potential distribution. Thus, the clock wiring corresponding to the power supply potential distribution and reference potential distribution in the integrated circuit is designed so that clock skew can be reduced, and that the stable supply of clock distribution can be realized even under conditions that temporal power voltage fluctuation is generated. COPYRIGHT: (C)2004,JPO&NCIPI
|
