发明名称 |
POWER GATING CIRCUIT AND METHOD OF OPERATING IT |
摘要 |
PROBLEM TO BE SOLVED: To minimize a leakage current and power losse resulting from the leakage current. SOLUTION: A power gating circuit contains a MOS circuit having first and second power supply terminals for a memory circuit etc., a P-channel transistor 12 having a drain coupled with the first power supply terminal of the MOS circuit, and an N-channel transistor 16 having a drain coupled with the second power supply terminal of the MOS circuit. Negative V<SB>GS</SB>voltages are set in the transistors 12 and 16 in a standby mode and boosted V<SB>GS</SB>voltages are set in the transistors 12 and 16 in an active mode. COPYRIGHT: (C)2004,JPO&NCIPI
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申请公布号 |
JP2004201268(A) |
申请公布日期 |
2004.07.15 |
申请号 |
JP20030145060 |
申请日期 |
2003.05.22 |
申请人 |
UNITED MEMORIES INC;SONY CORP |
发明人 |
PARRIS MICHAEL C;KIM C HARDY |
分类号 |
H03F3/72;H03K17/00;H03K17/687;H03K19/00;(IPC1-7):H03K17/687 |
主分类号 |
H03F3/72 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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