发明名称 |
Semiconductor integrated circuit device |
摘要 |
A semiconductor chip is divided into a first semiconductor region surrounded by pads and a region outside the pads. A memory is arranged at the region outside the pads. A memory arranged in the first semiconductor region and the memory arranged outside the pads are coupled to a bus interface unit via separate memory buses and a selector. The selector is driven by two phase, non-overlapping clock signals. A semiconductor integrated circuit device is provided that can easily accommodate for modification in the memory capacity of the memory and that can transfer signal/data at high speed with a low power consumption, irrespective of modification in bus interconnection length.
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申请公布号 |
US2004136260(A1) |
申请公布日期 |
2004.07.15 |
申请号 |
US20030742886 |
申请日期 |
2003.12.23 |
申请人 |
RENESAS TECHNOLOGY CORP. |
发明人 |
NAGATA SHINYA;WATANABE KATSUYOSHI;IKEMOTO MASAHIKO |
分类号 |
G11C11/41;G11C5/02;G11C5/06;G11C7/10;G11C11/401;G11C11/408;G11C11/413;G11C11/417;G11C16/02;H01L21/82;H01L21/822;H01L27/04;(IPC1-7):G11C8/00 |
主分类号 |
G11C11/41 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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