摘要 |
<p><P>PROBLEM TO BE SOLVED: To avoid jumping of the RTS value and reduce the jitter quantity of a clock recovered from the RTS value. <P>SOLUTION: The clock generating apparatus comprises an input unit for inputting a communication signal having specified information at a specified position to be transferred in an asynchronous transfer system as a plurality of asynchronous transfer system cells; a cell processor 7 which outputs the specified information that a specified asynchronous transfer system cell among the plurality of asynchronous transfer system cell has at the specified position as clock information, complements the clock information, if needed, using the specified information that a different asynchronous transfer system cell from the specified asynchronous transfer system cell among the plurality of asynchronous transfer system cell has at the specified position; and outputs the complemented clock information; and a clock generator 50 for generating the clock signal, using the clock information. <P>COPYRIGHT: (C)2004,JPO&NCIPI</p> |