| 摘要 |
PROBLEM TO BE SOLVED: To output a stable control signal having no zitter from a DLL circuit. SOLUTION: The semiconductor integrated circuit comprises a variable delay circuit 33, a frequency dividing circuit 30, a phase comparator circuit 31 and a phase locked circuit 3. The variable delay circuit 33 comprises a plurality of delay unit stages and outputs internal clock signals by letting pass external clock signals through the predetermined number of stages of the delay units. The dividing circuit 30 generates dividing clock signals by dividing the external clock signals. The dividing clock signal is supplied to a first input, and a feedback clock signal in response to the internal clock signal, is supplied to a second input. The phase comparator circuit 31 compares the phase of the first input with that of the second input. The phase locked circuit 3 is provided with a delay control circuit 32 which selects the number of the delay units of the variable delay circuit based on the output of the phase comparator circuit. The integrated circuit is further provided with a dedicated power supply circuit 91 which supplies exclusive power to the phase locked circuit. COPYRIGHT: (C)2004,JPO&NCIPI
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