| 摘要 |
PURPOSE: An SRAM(static random access memory) device composed of a vertical transistor is provided to reduce the cell size of vertical transistors, and to embody low power consumption by maintaining a sufficient size of a channel length of a transistor regardless of the cell size. CONSTITUTION: The first and second active regions of an L type are disposed in a substrate, defined by a field region. N-type and P-type doping regions are disposed in a predetermined region of the first and second active regions. Pillars are disposed on the N-type and P-type doping regions. A gate insulation layer is formed on the sidewall of the pillars to dispose the first gate electrode on the sidewall of the pillars with an access transistor. The second gate electrode is disposed on the sidewall of the pillars with a pull-up transistor and a driver transistor. The L-typed active region is interconnected with a reverse L-type active region. The pillars are interconnected by contact plugs. The first interconnection(227a) for a bitline 1, the second interconnection(227b) for a power line, the third interconnection(227c) for a ground line and the fourth interconnection(227d) for a bitline 2 are disposed in parallel with one another on the contact plugs. A wordline is disposed in the first gate electrode, perpendicular to the interconnections through a wordline contact plug.
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