发明名称 |
Integrated circuit having a memory cell transistor with a gate oxide layer which is thicker than the gate oxide layer of a peripheral circuit transistor |
摘要 |
A gate insulating film in a memory cell portion is thicker than a gate insulating film in a peripheral circuitry. Source/drain of an MOS transistor in the memory cell portion have double-diffusion-layer structures, respectively, and source/drain of an MOS transistor in the peripheral circuitry have triple-diffusion-layer structures, respectively.
|
申请公布号 |
US6762084(B2) |
申请公布日期 |
2004.07.13 |
申请号 |
US20020053543 |
申请日期 |
2002.01.24 |
申请人 |
RENESAS TECHNOLOGY CORP. |
发明人 |
SHIMIZU MASAHIRO;TANAKA YOSHINORI;ARIMA HIDEAKI |
分类号 |
H01L21/8234;H01L21/8242;H01L27/088;H01L27/108;(IPC1-7):H01L21/336 |
主分类号 |
H01L21/8234 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|