发明名称 |
SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD |
摘要 |
PROBLEM TO BE SOLVED: To realize miniaturization, low on-resistance and cost reduction of an IC chip having a TLPM and a planar device on the same semiconductor substrate. SOLUTION: A gate electrode 126 of a TLPM 100, a gate electrode 226 of an NMOS 200 and a gate electrode 326 of a PMOS 300 are formed by patterning the same polysilicon layer. The drain electrode 127 and the source electrode 128 of the TLPM 100, the drain electrode 227 and the source electrode 228 of the NMOS 200 and the drain electrode 327 and the source electrode 328 of the PMOS 300 are formed by patterning the same metal wiring layer. The TLPM 100 and the NMOS 200 and the PMOS 300 are electrically connected via the metal wiring layer and the polysilicon layer without carrying out wire bonding to a printed substrate. COPYRIGHT: (C)2004,JPO&NCIPI
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申请公布号 |
JP2004193535(A) |
申请公布日期 |
2004.07.08 |
申请号 |
JP20030008303 |
申请日期 |
2003.01.16 |
申请人 |
FUJI ELECTRIC DEVICE TECHNOLOGY CO LTD |
发明人 |
SUGI YOSHIO;FUJISHIMA NAOTO;KITAMURA MUTSUMI;TABUCHI KATSUYA;WAKIMOTO SETSUKO |
分类号 |
H01L29/41;H01L21/822;H01L21/8234;H01L27/04;H01L27/088;H01L29/417;H01L29/78;(IPC1-7):H01L21/823 |
主分类号 |
H01L29/41 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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