发明名称 CMIS SEMICONDUCTOR NONVOLATILE STORAGE CIRCUIT
摘要 <p>A semiconductor nonvolatile storage circuit characterized in that two MISFET transistors having like characteristics are provided, the voltage of the gate electrode of a first transistor is controlled to the power supply voltage or a value other than the ground voltage for a specific period of time so as to control the conduction of only the fist transistor, deterioration of the conduction resistance of the first transistor is thereby induced, the thus caused difference in performance between the first and second transistors are read in the form of the current difference by allowing the two transistors to conduct simultaneously so as to store and read "0", and contrarily deterioration of the performance of the second transistor is induced while not inducing deterioration of the performance of the first one so as to store "1".</p>
申请公布号 WO2004057621(A1) 申请公布日期 2004.07.08
申请号 WO2003JP16143 申请日期 2003.12.17
申请人 NAKAMURA, KAZUYUKI 发明人 NAKAMURA, KAZUYUKI
分类号 G11C14/00;G11C11/41;G11C16/02;G11C16/04;H01L21/8244;H01L27/10;H01L27/11;(IPC1-7):G11C13/00 主分类号 G11C14/00
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