| 摘要 |
PROBLEM TO BE SOLVED: To provide a bus controller capable of improving the performance of the entire system by shortening the standby time of access between an external device such as a CPU and a local memory without the need of a plurality of shared memories, and to provide an information processing system using it. SOLUTION: In the bus controller provided with an external interface 2, an internal unit 3, a memory interface 4 and an internal bus 7, the memory interface 4 is made to monitor the using conditions of the internal bus 7, a priority section in which only the external interface 2 can use the internal bus 7 in the case that the internal unit 3 is not using the internal bus 7 is set and the use of the internal bus 7 by the internal unit 3 is limited in the priority section. COPYRIGHT: (C)2004,JPO&NCIPI
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