METHOD AND DEVICE FOR GENERATING A CLOCK SIGNAL WITH PREDETERMINED CLOCK SIGNAL PROPERTIES

摘要

A method and device for generating a clock signal (CLKOUT) with predetermined clock signal properties firstly prepare a number of clock signals (PCLK[n-1: 0]) with an essentially identical frequency and with a respectively different phase relation with regard to a master clock signal (CLK) in order to subsequently (on the basis of a control signal (PEN[ ]), which is prepared according to the clock signal to be generated), select predetermined clock signals from the number of prepared clock signals and to combine the selected clock signals in order to generate the desired clock signal (CLKOUT).