发明名称 Methods and apparatus to compile a software program to manage parallel mucaches
摘要 Methods and apparatus to compile a software program to manage parallel mu caches are disclosed. The compiler identifies a first set of load instructions for possibly bypassing a first cache and attempts to schedule the software program such that the load instructions in the first set of load instructions has at least a first predetermined latency greater than the latency of the first cache. The compiler also identifies a second set of load instructions in the scheduled software program having less than the first predetermined latency. The second set of load instructions is marked to access the first cache. The compiler identifies a third set of load instructions for possibly bypassing a second cache and attempts to schedule the software program such that the load instruction in the third set have at least a second predetermined latency greater than the latency of the second cache. The compiler identifies a fourth set of load instructions in the scheduled software program having less than the second predetermined latency and marks the fourth set of load instructions to access the second cache. The compiler continues this process of identifying a set of load instructions for bypassing a cache, scheduling the software program such that the such that the load instructions in the set of load instructions has at least a predetermined latency greater than the latency of the cache and identifying a set of load instructions in the scheduled software program having less than the predetermined latency until all the caches are processed.
申请公布号 US2004133886(A1) 申请公布日期 2004.07.08
申请号 US20030739500 申请日期 2003.12.17
申请人 WU YOUFENG 发明人 WU YOUFENG
分类号 G06F9/00;G06F9/45;G06F12/08;(IPC1-7):G06F9/45 主分类号 G06F9/00
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