发明名称 |
Method of manufacturing a dual damascene interconnect |
摘要 |
An integrated circuit (100,200) manufacturing method (300) includes providing a base (102,202), forming thereon a first conductor (104,204), forming thereon a first barrier layer (106,206), forming thereon a first d
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申请公布号 |
EP1435656(A2) |
申请公布日期 |
2004.07.07 |
申请号 |
EP20030025373 |
申请日期 |
2003.11.04 |
申请人 |
CHARTERED SEMICONDUCTOR MANUFACTURING LTD. |
发明人 |
WUPING, LIU;TAN, JUAN BOON;ZHANG, BEI CHAO;CUTHBERTSON, ALAN |
分类号 |
H01L21/768;(IPC1-7):H01L21/768 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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