发明名称 Method of forming a transistor
摘要 <p>One or more aspects of the present invention relate to forming a transistor (400) while passivating electrically active defects (408) associated with a top portion (406) of a layer of high-k dielectric material (404). The layer of high-k dielectric material is utilized to establish a high-k gate dielectric in the transistor. A gate electrode layer (414) is formed over the layer of high-k dielectric material, and is patterned to form a gate structure that includes a gate electrode and the high-k gate dielectric. The electrically active defects are passivated utilizing materials containing dopants that are attracted to and neutralize the defects. The passivated defects thus do not interfere with other transistor doping processes ( e.g. , forming source and drain regions) and do not adversely affect resulting semiconductor device performance, reliability and yield.</p>
申请公布号 EP1435650(A2) 申请公布日期 2004.07.07
申请号 EP20030104980 申请日期 2003.12.24
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 COLOMBO, LUIGI;CHAMBERS, JAMES J.;ROTONDARO, ANTONIO L P
分类号 H01L29/51;H01L29/78;H01L21/28;H01L21/336;(IPC1-7):H01L21/336 主分类号 H01L29/51
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