| 摘要 |
PURPOSE: A method for forming an isolation layer of a semiconductor device is provided to prevent parasitic transistor and leakage current due to moat between an isolation region and an active region. CONSTITUTION: The first trench is formed by selectively etching a substrate(41) using a pad oxide pattern(43) and a nitride pattern. The first oxide layer and a doped polysilicon layer are sequentially formed on the first trench. The second trench is formed by etching the polysilicon layer, the first oxide layer and the substrate. An N-well region(57) is then formed by implanting N-type dopants. At this time, a hole dose upgrade region(59) is simultaneously formed. A polysilicon spacer(51) is formed at the sidewall of the first trench by etching the polysilicon layer. The second oxide layer(61) is grown and an isolation layer(63) is filled in the first and second trenches. Then, a P-well region(67) is formed.
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