发明名称 Universal parallel processing decoder
摘要 The present invention provides an apparatus and method for universal decoding of both feedforward codes and feedback codes, such as decoding of a 512-state feedforward code, a 32-state feedback code and 8-state feedback code. Utilizing parallel processing, the present invention determines, for each current state of a feedforward or a feedback code, its most likely previous states, resulting in a determination of a terminating state and a penultimate terminating state. From the penultimate terminating state and terminating state, associated subset bits are determined. In the preferred embodiment, the subset bits are determined by re-encoding the most significant bit of the penultimate terminating state in an encoder having a current state equal to the terminating state. Utilizing an equalized, received signal, a closest signaling point, with an associated index, is selected from a subset of a signaling constellation corresponding to the associated subset bits. The decoded higher significant bits are determined as equal to the corresponding higher significant bits of the associated index. For a feedforward code, the decoded least significant input bit is determined as equal to the most significant bit of the penultimate terminating state, while for a feedback code, the decoded input bit is determined as equal to the most significant subset bit.
申请公布号 US6760385(B1) 申请公布日期 2004.07.06
申请号 US20000580959 申请日期 2000.05.30
申请人 ADTRAN, INC. 发明人 GOODSON RICHARD L.
分类号 H03K7/00;H03K9/00;H04L25/03;H04L27/06;(IPC1-7):H04L27/06 主分类号 H03K7/00
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