发明名称 METHOD FOR FORMING PLUG OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for forming a plug of a semiconductor device is provided to obtain sufficient process margin in LPC(Landing Plug Contact) processing by improving the uniformity of an interlayer dielectric. CONSTITUTION: A gate stacked structure(200) including a gate(22) and a hard mask(23) is formed on a semiconductor substrate(20). A spacer(24) is formed at both sidewalls of the gate stacked structure. The first interlayer dielectric is filled between the spacers. The first interlayer dielectric is planarized to expose the hard mask by CMP(Chemical Mechanical Polishing). The second interlayer dielectric is formed on the first interlayer dielectric. A contact hole is formed to expose the substrate by etching the second and first interlayer dielectric. A landing plug is formed in the contact hole.
申请公布号 KR20040060004(A) 申请公布日期 2004.07.06
申请号 KR20020086513 申请日期 2002.12.30
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KIM, HYEONG HWAN
分类号 H01L21/28;(IPC1-7):H01L21/28 主分类号 H01L21/28
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