摘要 |
PURPOSE: A digital control logic circuit having a time hysteresis characteristic is provided to restrict a variation of unnecessary short pulse signals in a transition process of a digital control signal by connecting time hysteresis circuits in parallel to each other. CONSTITUTION: A digital control logic circuit having a time hysteresis characteristic includes a first time hysteresis circuit, a second time hysteresis circuit, and an inverter. The first time hysteresis circuit(30) has a hysteresis characteristic when a logic level of an input signal is shifted. The second time hysteresis circuit(31) is connected in parallel to the first time hysteresis circuit. The second time hysteresis circuit has the hysteresis characteristic when a logic level of an output of the first time hysteresis circuit is shifted. The inverter(12) is used for inverting an output of the second time hysteresis circuit.
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