发明名称 |
METHOD FOR FORMING METAL BIT LINE OF SEMICONDUCTOR DEVICE |
摘要 |
PURPOSE: A method for forming a metal bit line of a semiconductor device is provided to prevent degradation of patterns, and to improve resolution by forming an insulating spacer at sidewalls of a damascene pattern. CONSTITUTION: A bit line contact plug(12) is formed to connect a lower conductive layer(10) through the first interlayer dielectric(11). The second interlayer dielectric(13) is formed on the resultant structure. A damascene pattern is formed by selectively etching the second interlayer dielectric. An insulating spacer(15) is formed at both sidewalls of the damascene pattern. Then, a metal film(16) as a bit line is filled in the damascene pattern.
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申请公布号 |
KR20040059935(A) |
申请公布日期 |
2004.07.06 |
申请号 |
KR20020086441 |
申请日期 |
2002.12.30 |
申请人 |
HYNIX SEMICONDUCTOR INC. |
发明人 |
CHOI, IK SU;KIM, JAE YEONG |
分类号 |
H01L21/768;(IPC1-7):H01L21/768 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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