发明名称 CLOCK PULSE GENERATION CIRCUIT
摘要 PURPOSE: A clock pulse generation circuit is provided to maintain the stability by generating an internal clock pulse having a constant high pulse width according to a particular frequency. CONSTITUTION: A clock pulse generation circuit include a first pulse generator, a second pulse generator, and a first logic unit. The first pulse generator(10) is used for generating an internal clock pulse having a constant high pulse width when a frequency of an external clock signal is more than a particular frequency. The second pulse generator(20) is used for generating the internal clock pulse when the frequency of the external clock signal is less than the particular frequency. The first logic unit selects one of outputs of the first pulse generator and the second pulse generator and outputs the internal clock pulse.
申请公布号 KR20040058520(A) 申请公布日期 2004.07.05
申请号 KR20020084792 申请日期 2002.12.27
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KOO, CHEOL HUI
分类号 H03K5/00;(IPC1-7):H03K5/00 主分类号 H03K5/00
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