发明名称 SEMICONDUCTOR MEMORY DEVICE HAVING PIPE LATCH CAPABLE OF SIMPLIFYING ARRANGEMENT
摘要 PURPOSE: A semiconductor memory device having a pipe latch is provided to simplify data arrangement. CONSTITUTION: The first control signal generation unit(920) outputs a control signal which is generated by logic assembly of a pipe latch in signal and a start odd-start even data output control signal. The second control signal generation unit(930) outputs a control signal which is generated by logic assembly of an odd number data enable signal to output odd-numbered data and a control signal to arrange odd-numbered data in correspondence to a start address, and outputs a control signal which is generated by logic assembly of an even number data enable signal to output even-numbered data and a control signal to arrange the even-numbered data in correspondence to the start address. A signal transfer unit(910) is controlled by the controls signal being output from the first and the second control signal generation unit, and outputs data loaded on the first and the second multiplexer even number output line and the first and the second multiplexer odd number output line.
申请公布号 KR20040059225(A) 申请公布日期 2004.07.05
申请号 KR20020085808 申请日期 2002.12.28
申请人 HYNIX SEMICONDUCTOR INC. 发明人 YOON, YEONG JIN
分类号 G11C7/00;(IPC1-7):G11C7/00 主分类号 G11C7/00
代理机构 代理人
主权项
地址