发明名称 |
SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF |
摘要 |
PURPOSE: A semiconductor memory device and a manufacturing method thereof are provided to reduce size and to improve capacitance by forming a vertical type cell transistor in a semiconductor substrate and forming sequentially a cylindrical type capacitor on the cell transistor. CONSTITUTION: An upper impurity junction(4a) as a drain and a lower impurity junction(4b) as a source are formed in a semiconductor substrate(1). The upper and lower impurity junction are vertically spaced apart from each other. A bit line(7) is formed under the lower impurity junction. The lower impurity junction is partially exposed by forming the first trenches in the substrate. A gap-fill dielectric layer is filled in the first trenches. The bit line is partially exposed by forming a cylindrical type second trench between the first trenches. The first isolation insulating layer(13) is formed at a bottom of the second trench. A gate insulating layer(14) is formed at an inner wall of the second trench. A gate electrode(15) is formed at an inner wall of the gate insulating layer. The second isolation insulating layer(16) is filled in the second trench. A cylindrical type storage node electrode(17) for contacting the upper impurity junction is formed on the first trench. Then, a dielectric film(18) and a plate node electrode(19) are sequentially formed on the storage node electrode.
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申请公布号 |
KR20040059487(A) |
申请公布日期 |
2004.07.05 |
申请号 |
KR20020086235 |
申请日期 |
2002.12.30 |
申请人 |
DONGBU ELECTRONICS CO., LTD. |
发明人 |
PARK, CHEOL SU |
分类号 |
H01L27/108;(IPC1-7):H01L27/108 |
主分类号 |
H01L27/108 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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