| 摘要 |
PURPOSE: An interleaver control device using a nonvolatile ferroelectric memory is provided to reduce a system access latency time by a row access time and a restore time by performing an interleaver program using the nonvolatile ferroelectric memory chip. CONSTITUTION: A single chip FRAM array comprises a plurality of single banks. A memory interleaver control part(40) programs a code for memory interleaver control, and changes an address path of the single chip FRAM array according to a programmed code. A bus exchanges mutual data between the single chip FRAM array and the memory interleaver control part.
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