发明名称 |
METHOD FOR FORMING PLUG OF SEMICONDUCTOR DEVICE |
摘要 |
PURPOSE: A method for forming a plug of a semiconductor device is provided to prevent dishing by minimizing the difference of polishing selectivity between a polysilicon layer and an interlayer dielectric or a hard mask in CMP. CONSTITUTION: A gate stacked structure(100) including a gate(12) and a hard mask(13) is formed on a substrate(10). An interlayer dielectric is formed on the resultant structure. A contact hole is formed by selectively etching the interlayer dielectric. A polysilicon layer is filled in the contact hole. Self-silicon ion-implantation processing is performed to increase the content of silicon in the interlayer dielectric and the hard mask. A plug(16A) is then formed by CMP of the polysilicon layer.
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申请公布号 |
KR20040057554(A) |
申请公布日期 |
2004.07.02 |
申请号 |
KR20020084315 |
申请日期 |
2002.12.26 |
申请人 |
HYNIX SEMICONDUCTOR INC. |
发明人 |
AHN, TAE HANG;LEE, MIN YONG |
分类号 |
H01L21/28;(IPC1-7):H01L21/28 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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