| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a microcomputer that confirms the data written in an operation mode setting register by automatically reading the instruction immediately after a writing instruction. <P>SOLUTION: A CPU 20 performs a writing operation for setting a peripheral enable signal in an SFR 40 in an asserted state and asserts the peripheral enable signal at one cycle. Thus, peripheral reading/writing signals become valid and the SFR 40 outputs data which are set at the time of the writing operation onto a peripheral data bus. <P>COPYRIGHT: (C)2004,JPO&NCIPI</p> |
