发明名称 METHOD AND PROGRAM FOR DESIGNING INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To make a spot determinable from the layout data of the circuit, in the spot where transistors may be broken when an overvoltage is impressed upon an integrated circuit. SOLUTION: In the integrated circuit, a thick film transistor provided with a gate oxide film having a first thickness and a thin film transistor thinner than the first thickness exist on the same circuit and a plurality of kinds impressed voltages exists. At the time of designing integrated circuit, the combinations which may cause transistor breakage are listed from the correlation between the thick and thin film transistors and the impressed voltages, and the spot where the transistors may be broken is determined by checking the layout data of the designed integrated circuit based on the listed correlation. In addition, the voltage impressed upon each terminal of the transistors indicated by the layout data is made easily understandable by adding the information corresponding to the impressed voltages to each terminal in the layout data. COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004186421(A) 申请公布日期 2004.07.02
申请号 JP20020351512 申请日期 2002.12.03
申请人 SONY CORP 发明人 IKEDA SHIRO
分类号 G06F17/50;H01L21/82;H01L21/8234;H01L27/088;(IPC1-7):H01L21/82;H01L21/823 主分类号 G06F17/50
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