PARALLEL INTERFACING APPARATUS BETWEEN MAC PROCESSOR AND BASEBAND PROCESSOR AND METHOD THEREFOR

摘要

PURPOSE: A parallel interfacing apparatus between a MAC(Media Access Control) processor and a baseband processor and a method therefor are provided to perform a relatively low speed and minimize a size of a buffer. CONSTITUTION: A transmission length register(404) stores an overall length value of MPDU(Mac Protocol Data Unit) data received from outside. A transmission rate register(401) stores a transmission rate value received from outside. An NDBPS(Number of Data Bits Per Symbol) generator(402) calculates NDBPS by using the transmission rate value and generates an enable signal to a transmission clock generator(407) and a memory controller(406). A clock counter(403) counts scanning clocks. A symbol counter(405) increases a value at time intervals required for outputting one OFDM(Orthogonal Frequency Division Multiplexing) symbol. A transmission clock generator(407) generates a transmission clock and transmits it to a MAC processor. A transmission clock counter(410) counts transmission clocks. A comparator(408) compares a value of the transmission clock counter and a value of the transmission length register(404) and stops operation of the transmission clock generator(407). A memory unit(409) receives MPDU data in parallel from the MAC processor. A memory controller(406) controls the memory unit(409).