| 摘要 |
A data transmitting and receiving device, which transmits and receives ATM cells between the calculation processing modules is described. The ATM-based data transmitting and receiving device includes a transmitting means and a data receiving means. The data receiving means includes a memory controller for controlling storage of successively received ATM cells in corresponding cell buffers, and a memory controlled by it. The memory includes a linked cell buffer, a free cell buffer identifier queue, a receiving state table and a receiving completion state queue. Accordingly, a separate device (e.g., ASIC chip) can be used to transmit and receive ATM cells instead of the conventional calculation processing module so that the transmission efficiency of the ATM cell can be increased and the load of the calculation processing device can be reduced.
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