发明名称 METHOD FOR FORMING ISOLATION LAYER OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for forming an isolation layer of a semiconductor device is provided to prevent a threshold voltage from varying by preventing an INWE(inverse narrow width effect) caused by a moat effect at the top corner of a STI(shallow trench isolation). CONSTITUTION: A pad oxide layer(201) and an organic ARC(anti-reflective coating)(202) are sequentially formed on a silicon substrate. A photoresist pattern(203) for defining a trench is formed on the organic ARC. The organic ARC and the pad oxide layer are selectively etched to expose a part of the silicon substrate by using the photoresist pattern. The trench is formed in the exposed silicon substrate. After the organic ARC and the photoresist pattern are eliminated, a gap-fill oxide layer is deposited to fill the inside of the trench. After a planarization process is performed by using the pad oxide layer as an etch stop layer, the pad oxide layer is eliminated.
申请公布号 KR20040056203(A) 申请公布日期 2004.06.30
申请号 KR20020082774 申请日期 2002.12.23
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KIM, JONG IL
分类号 H01L21/76;(IPC1-7):H01L21/76 主分类号 H01L21/76
代理机构 代理人
主权项
地址