DIGITAL SIGNAL PROCESSING CIRCUIT FOR A TELEVISION RECEIVER

摘要

DIGITAL SIGNAL PROCESSING CIRCUIT FOR A TELEVISION RECEIVER COMPRISING: A FIRST FIELD MEMORY (1'') FOR STORING INPUT DATA REPRESENTATIVE OF THE CHROMINANCE OR LUMINANCE PORTION OF ONE FIELD; FIRST INTERPOLATION MEANS (2'') FOR GENERATING INTERPOLATED LINE DATA BASED ON LINE DATA RECEIVED FROM SAID FIRST FIELD MEMORY; ZOOMING AND UP-CONVERSION CONTROL MEANS (11) FOR CONTROLLING THE READ-OUT OF LINE DATA FROM SAID FIRST FIELD MEMORY (1'') AND THE INTERPOLATION PERFORMED BY SAID INTERPOLATION MEANS BASED ON A ZOOM FACTOR INPUT TO SAID ZOOMING AND UP-CONVERSION CONTROL MEANS (11). (FIGURE 3)