发明名称 |
Logical bus overlay for increasing system bus data rate |
摘要 |
A system and method for increasing the data rate of a system bus without making modifications to existing (legacy) devices connected to the bus. A logical bus is overlaid onto one or more physical buses in a TDM manner. The overlaying is done by transmitting data into the one or more existing buses during a previously unused phase of the bus clock having no effect on existing devices connected to the buses. The additional devices are capable of latching data on either phase bus clock. <IMAGE>
|
申请公布号 |
EP1434139(A2) |
申请公布日期 |
2004.06.30 |
申请号 |
EP20030300224 |
申请日期 |
2003.11.24 |
申请人 |
ALCATEL CANADA INC. |
发明人 |
MARGERM, STEVEN DOUGLAS;HAWES, DARWIN NOEL |
分类号 |
G06F3/00;G06F13/40;G06F13/42;(IPC1-7):G06F13/42 |
主分类号 |
G06F3/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|