AIR GAP DUAL DAMASCENE PROCESS AND STRUCTURE

摘要

A dual damascene air gap process reduces the dielectric constant, and extends CVD low-k technology by removing the sacrificial intra-metal dielectric (16) between conductive lines (22) by patterned etching and replacement with lower k material (26). The void space (28) between the narrowly spaced conductive lines (22) is sealed in by the non-conformal CVD deposition, thereby further reducing the overall capacitance of the dual damascene interconnect formation.