| 摘要 |
PROBLEM TO BE SOLVED: To establish high speed responsiveness in an active mode and operation stability in a sleep mode, and to reduce a circuit area in forming it on an integrated circuit. SOLUTION: The operation of a power transistor PTr is controlled by an error amplifier VEA equipped with transistors M1 and M2 whose sources are commonly connected so that a differential pair can be formed and a transistor M3 whose gate is connected to the drain of the transistor M2. In this case, a transistor M4 whose channel width and channel length has almost the same ratio as that of the transistor M3 is configured to switch the gain of the error amplifier VEA, and the gate and source of the transistor M4 are connected to the gate of the transistor M3 to configure the transistor M3 and a current mirror circuit. Then, a transistor M5 which is turned on/off according to an outside control signal (Sg) is connected to the drain of the transistor M4. COPYRIGHT: (C)2004,JPO
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