发明名称 |
Method for fabrication of semiconductor device |
摘要 |
A novel method is presented to provide ASICs with drastically reduced NRE and with volume flexibility. The invention includes a method of fabricating an integrated circuit, including the steps of: providing a semiconductor substrate, forming a borderless logic array including a plurality of Area I/Os and also including the step of forming redistribution layer for redistribution at least some of the Area I/Os for the purpose of the device packaging. The fabrication may utilize Direct Write e-Beam for customization. The customization step may include fabricating various types of devices at different volume from the same wafer.
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申请公布号 |
US2004119098(A1) |
申请公布日期 |
2004.06.24 |
申请号 |
US20020321669 |
申请日期 |
2002.12.18 |
申请人 |
EASIC CORPORATION |
发明人 |
OR-BACH ZVI;COOKE LAURANCE |
分类号 |
H01L21/44;H01L23/34;H01L23/48;H01L23/525;H01L27/10;(IPC1-7):H01L27/10 |
主分类号 |
H01L21/44 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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