发明名称 PLL CIRCUIT AND REPRODUCING DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To shorten the period of time required for a simplified and sure lock-in, regarding a PLL circuit and a reproducing device, when applied to a video tape recorder with a non-tracking method, for example. <P>SOLUTION: Feed back control on a PLL circuit 9 is limited, by comparing first and second deciding clocks (TH1, TH2) by the highest frequency and the lowest frequency, which can be measured by a clock CK, by means of a reproducing signal DRF. <P>COPYRIGHT: (C)2004,JPO
申请公布号 JP2004178719(A) 申请公布日期 2004.06.24
申请号 JP20020344957 申请日期 2002.11.28
申请人 SONY CORP 发明人 YAMAOKA SHINSUKE
分类号 G11B20/14;H03L7/087;H03L7/093;H03L7/107 主分类号 G11B20/14
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