发明名称 SEMICONDUCTOR MEMORY, CONTROL METHOD FOR THE SAME, AND PORTABLE ELECTRONIC APPARATUS
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a semiconductor memory and a control method for the same which are capable of holding memory of more than 2 bits per memory element even if it is scaled down, performing stable operation, and preventing malfunctions such as a rewrite fault caused by level drop of a power source voltage supplied from outside. <P>SOLUTION: The semiconductor memory is provided with a memory cell array using as a memory cell the memory device consisting of a gate electrode formed on a semiconductor layer across a gate insulating film, a channel area arranged under the gate electrode, a dispersion area arranged on both sides of the channel area and having a reverse conductivity type to the channel area, and a memory function body formed on both sides of the gate electrode and having a function to hold a charge. When a first and a second power source voltage VCC 1 and VCC 2 supplied from the outside are lower than a prescribed voltage, a rewrite command to a memory circuit 34 including the memory cell array is prohibited by a lockout circuit 33a. <P>COPYRIGHT: (C)2004,JPO</p>
申请公布号 JP2004178782(A) 申请公布日期 2004.06.24
申请号 JP20030142157 申请日期 2003.05.20
申请人 SHARP CORP 发明人 YAOI YOSHIFUMI;IWATA HIROSHI;SHIBATA AKIHIDE;TOKUI KEI;NAWAKI MASARU
分类号 G11C16/02;G11C16/04;G11C16/06;G11C16/22;H01L21/28;H01L21/8247;H01L27/10;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C16/02;H01L21/824 主分类号 G11C16/02
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