发明名称 SEMICONDUCTOR MEMORY DEVICE WITH MEMORY CELLS ARRANGED IN HIGH DENSITY FOR REDUCING OCCUPIED AREA
摘要 PURPOSE: A semiconductor memory device is provided to reduce occupied area of a memory cell in a twin-cell mode DRAM(Dynamic Random Access Memory) by minimizing the size of a basic cell region. CONSTITUTION: A plurality of memory cells(BCU) are arranged in rows and columns. Each memory cell includes a transistor and a capacitor. A plurality of bit lines(BL0-BL9) are arrayed corresponding to memory cell columns. A plurality of word lines(WL0-WL5) are arrayed corresponding to memory cell rows. The word lines cross the bit lines. Each memory cell includes an active region extending to a direction between extending directions of corresponding word and bit lines, and a storage node electrically connected to the active region. A bit line contact(BC) is used for connecting electrically the active region of each memory cell with a corresponding bit line. The bit line contact is provided to each bit line in a row direction. A word line is arranged at both sides of neighboring bit line contacts in a column direction. Each bit line contact is commonly used by two neighboring memory cells in a column direction.
申请公布号 KR20040053753(A) 申请公布日期 2004.06.24
申请号 KR20030059475 申请日期 2003.08.27
申请人 RENESAS TECHNOLOGY CORP. 发明人 TSUKIKAWA YASUHIKO
分类号 H01L27/108;G11C11/401;G11C11/404;G11C11/4097;H01L21/3205;H01L21/8242;H01L27/02;(IPC1-7):H01L21/320 主分类号 H01L27/108
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