发明名称 Distortion reducing circuit
摘要 A distortion reducing circuit compensates an upper side third-order distortion and a lower side third-order distortion produced by an amplifier for amplifying a fundamental signal including multiple frequency components. The distortion reducing circuit includes a second harmonic reflection coefficient regulation circuit, installed at an output side of the amplifier, for regulating reflection coefficients for multiple frequency components included in a second harmonic signal to have a constant value.
申请公布号 US6753728(B2) 申请公布日期 2004.06.22
申请号 US20020153630 申请日期 2002.05.24
申请人 HITACHI KOKUSAI ELECTRIC INC. 发明人 OKUBO YOICHI;FUNADA KIYOSHI;SUTO MASAKI;HORAGUCHI MASATO;TAKADA TOSHIO;HONGO NAOKI
分类号 H03F1/32;(IPC1-7):H03F1/26 主分类号 H03F1/32
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