发明名称 Read operations on multi-bit memory cells in resistive cross point arrays
摘要 A data storage device includes a resistive cross point array of memory cells. Each memory cell includes serially-connected first and second resistive devices. Each resistive device has programmable first and second resistance states. The data storage device further includes pluralities of first, second and third conductors, and a read circuit. Each first conductor is connected to data layers of a column of the first magnetoresistive devices; each second conductor is connected to data layers of a column of second magnetoresistive devices; and each third conductor is between reference layers of a row of first and second magnetoresistive devices. The read circuit applies different first and second voltages during read operations. The first voltage is applied to the first and second conductors crossing a selected memory cell; and the second voltage is applied to the third conductor crossing the selected memory cell.
申请公布号 US6754097(B2) 申请公布日期 2004.06.22
申请号 US20020234511 申请日期 2002.09.03
申请人 HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. 发明人 SHARMA MANISH;TRAN LUNG T.
分类号 G11C11/15;G11C11/56;H01L21/8246;H01L27/105;H01L43/08;(IPC1-7):G11C11/00 主分类号 G11C11/15
代理机构 代理人
主权项
地址