发明名称 System and method for terminating lock-step sequences in a multiprocessor system
摘要 There is provided, for use in a processing system containing a plurality of processors coupled to a main memory, a control circuit for perturbing a lock-step sequence of memory requests received from the processors. The control circuit comprises a memory request generator for generating at least one memory request operable to terminate the lock-step sequence of memory requests.
申请公布号 US6754787(B2) 申请公布日期 2004.06.22
申请号 US20020302372 申请日期 2002.11.22
申请人 INTEL CORPORATION 发明人 MILLER ROBERT J.;MCDONALD EDWARD A.
分类号 G06F9/46;G06F11/07;G06F13/16;(IPC1-7):G06F12/00;G06F13/00 主分类号 G06F9/46
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