| 摘要 |
A method of scan domain testing an integrated circuit in which a scan_mode signal is applied to the scan circuit elements (3) to select one of the scan domains. The scan circuit elements (3) of the selected scan domain are interconnected in the scan configuration in response to a scan_enable signal during a first scan phase (17) and scan_data signals are shifted sequentially through the interconnected scan circuit elements (3). The circuit elements (2, 3, 13) of the selected scan domain are interconnected in the functional configuration during a capture phase (18 to 21) so that the functional configuration of the selected scan domain processes data input signals and the signals registered by the scan circuit elements (3). The scan circuit elements (3) are interconnected again in the scan configuration during a second scan phase (22) and the output signals of the scan circuit elements (3) shifted out and compared with expected scan output signals. Scan circuit elements (3) of a group within the selected scan domain are connected to other circuit elements according to the scan configuration in response to the scan_mode signal at least during the capture phase (18 to 21), whereby to process signals received from the scan configuration during the capture phase (18 to 21).
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