| 摘要 |
PROBLEM TO BE SOLVED: To make a toggle ratio 100% in all of circuits constituting a semiconductor device while minimizing an increase in circuit cost by reducing the number of test patterns used in an IDDQ test of the semiconductor device. SOLUTION: This node logic fixing circuit is equipped with a MOSFET 1 inserted into an arbitrary node of the circuits constituting the semiconductor device for electrically cutting off the node in the IDDQ test and bringing it into electrical conduction in a non-IDDQ test according to an IDDQ mode control signal 7, a PFET 3 for setting the electrically cut-off node at the level of a power source according to a control signal 9, and an NFET 4 for setting the electrically cut-off node at the level of the earth according to a control signal 8. COPYRIGHT: (C)2004,JPO
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