发明名称 |
Formation of aligned capped metal lines and interconnections in multilevel semiconductor structures |
摘要 |
In integrated circuit technology; an electromigration and diffusion sensitive conductor of a metal such as copper and processing procedure therefore is provided, wherein, at a planarized chemical mechanical processed interfacing surface, the conductor metal is positioned in a region of a selectable low K eff dielectric material surrounded by a material selected to be protection from outdiffusion and a source of a film thickness cap that is to form over the conductor metal and/or serve as a catalytic layer for electroless selective deposition of a CoWP capping layer.
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申请公布号 |
US2004113277(A1) |
申请公布日期 |
2004.06.17 |
申请号 |
US20020316484 |
申请日期 |
2002.12.11 |
申请人 |
CHIRAS STEFANIE RUTH;LANE MICHAEL WAYNE;MALHOTRA SANDRA GUY;MC FEELY FENTON REED;ROSENBERG ROBERT;SAMBUCETTI CARLOS JUAN;VEREECKEN PHILIPPE MARK |
发明人 |
CHIRAS STEFANIE RUTH;LANE MICHAEL WAYNE;MALHOTRA SANDRA GUY;MC FEELY FENTON REED;ROSENBERG ROBERT;SAMBUCETTI CARLOS JUAN;VEREECKEN PHILIPPE MARK |
分类号 |
H01L21/768;H01L23/532;(IPC1-7):H01L23/48;H01L23/52;H01L29/40 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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