发明名称 Integrated semiconducting memory has read amplifier(s), pair(s) of bit lines with n segment bit line pairs for separate electrical connection to read amplifier; n is natural number greater than 1
摘要 The integrated semiconducting memory has at least one read amplifier (SA) and at least one pair of bit lines (BL) consisting of n segment bit line pairs (SBL) that can be electrically connected to the read amplifier separately from each other, where n is a natural number greater than 1. Each segment bit line pair can be electrically connected to the read amplifier by a switching arrangement (SW1-SW3).
申请公布号 DE10255834(A1) 申请公布日期 2004.06.17
申请号 DE20021055834 申请日期 2002.11.29
申请人 INFINEON TECHNOLOGIES AG 发明人 PROELL, MANFRED;SCHROEDER, STEPHAN;SCHNEIDER, RALF;KLIEWER, JOERG
分类号 G11C7/06;G11C7/12;G11C7/18;G11C11/4091;G11C11/4094;G11C11/4097;(IPC1-7):G11C7/00;G11C11/407 主分类号 G11C7/06
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