发明名称 |
Multistage pulse width modulator |
摘要 |
Two or more pulse width modulation stages, each having progressively higher resolution, are utilized to allow the lower resolution stage or stages to operate at lower clock speeds. Later stages are operated at higher clock speeds and thus a smaller portion of the total pulse width modulation circuit utilizes the higher clock speed. Additionally, later stages operate over smaller time intervals in order to reduce usage of the later stages.
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申请公布号 |
US2004113671(A1) |
申请公布日期 |
2004.06.17 |
申请号 |
US20020316376 |
申请日期 |
2002.12.11 |
申请人 |
ANDERSON JACK B.;ROBERTS CALEB |
发明人 |
ANDERSON JACK B.;ROBERTS CALEB |
分类号 |
H03K3/017;H03K5/04;H03K7/08;(IPC1-7):H03K3/017 |
主分类号 |
H03K3/017 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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