发明名称 Reducing power dissipation in a match detection circuit
摘要 A CAM match detection circuit that maintains established levels of accuracy while greatly reducing the amount of power dissipated is disclosed. Rather than allowing the Matchline 185 voltage to swing between a precharge voltage level of VDD and ground, the Matchline voltage is restricted to swinging between a reduced precharge voltage level (i.e., a voltage level lower than VDD) and ground. Further, a source of a p-type transistor that makes up one transistor in each pair of series connected transistors is coupled to the Matchline thereby further reducing the Matchline swing voltage and the overall power dissipation of the match detection circuit.
申请公布号 US2004114410(A1) 申请公布日期 2004.06.17
申请号 US20020320493 申请日期 2002.12.17
申请人 REGEV ZVI;REGEV ALON 发明人 REGEV ZVI;REGEV ALON
分类号 G11C15/04;(IPC1-7):G11C15/04 主分类号 G11C15/04
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