| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a selection circuit for a memory cell which realizes increase in a storage capacity and cost reduction of the memory cell. <P>SOLUTION: Each data storage device (110, 410) includes a plurality of shunt elements (120, 420) having controlled current paths connected in series, and a plurality of memory cells (114, 414) having programmable resistance states. Each memory cell (114, 414) is connected across the controlled current path of a corresponding shunt element. <P>COPYRIGHT: (C)2004,JPO |
