| 摘要 |
PURPOSE: A nonvolatile ferroelectric memory device is provided to reduce the area and increase the driving signal speed by dividing a signal decoder region into two regions to control them. CONSTITUTION: A cell array block(10) comprises a plurality of memory cells. A first signal decoder block(20) and a second signal decoder block(30) decode signals for controlling a cell operation. A column select control block(40) selects a corresponding main bit line according to a column address. A control circuit block(50) is provided with control circuits such as a control signal generator, a buffer, a decoder, and a sense amplifier array. A data bus DB(DataBase) transmits data in the main bit line selected by the column select control block(40) to the control circuit block(50) or transfers the data, which is inputted the control circuit block(50), to the cell array block(10).
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