发明名称 |
METHOD FOR FORMING PIN STRUCTURE FIELD EFFECT TRANSISTOR |
摘要 |
PURPOSE: A method for forming a pin structure FET(Field Effect Transistor) is provided to be capable of overcoming the limitation of an exposure process for effectively forming a pin pattern on a substrate. CONSTITUTION: The first dummy pattern is formed on a channel forming region of a substrate(1). The second dummy pattern is formed by carrying out an isotropic etching process on the first dummy pattern. At this time, an active region is partially exposed to the outside through one side of the second dummy pattern. A pin(57) is formed on the active region by carrying out a selective crystal growing process. The second dummy pattern is removed from the resultant structure. A gate isolating layer(59) is formed on the pin. A gate conductive pattern is formed on the resultant structure, wherein the gate conductive pattern crosses the pin.
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申请公布号 |
KR20040050405(A) |
申请公布日期 |
2004.06.16 |
申请号 |
KR20020078229 |
申请日期 |
2002.12.10 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
CHOI, SI YEONG;JUNG, IN SU;LEE, BYEONG CHAN;LEE, DEOK HYEONG;YOO, JONG RYEOL |
分类号 |
H01L21/335;(IPC1-7):H01L21/335 |
主分类号 |
H01L21/335 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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