发明名称 Method of integrated circuit design checking using progressive individual network analysis
摘要 A method for checking integrated circuit designs comprising the steps of calculating a first performance parameter by analyzing the network's sensitivity to a signal applied to the network; comparing the first performance parameter to one or more rules to determine a first pass condition and writing the value of first performance parameter to a netlist file in response to a pass to the first pass condition; followed by calculating a second performance parameter based on a first network model to determine a second pass condition in response to a fail to said first pass condition and writing the second performance parameter to the netlist file in response to a pass to said second pass condition or writing an error flag to the netlist file in response to a fail to said second pass condition is disclosed. The method, at each step, decides if a quick to calculate parameter provides sufficient design margin or if a more accurate but longer to calculate parameter is required.
申请公布号 US6751744(B1) 申请公布日期 2004.06.15
申请号 US19990475799 申请日期 1999.12.30
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 ALLEN ROBERT J.;COHN JOHN M.;HATHAWAY DAVID J.
分类号 G06F1/12;G06F17/50;(IPC1-7):G06F1/12 主分类号 G06F1/12
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